LONDON – Cognovo Ltd. has said that its MCE160 software-defined modem, a version of which is currently being manufactured on its behalf by Samsung Foundry in 45-nm, is expected to consume less than 100-mW peak for simultaneous transmit and receive in LTE and significantly less for 2G and 3G applications. Cognovo (Melbourn, England) added that it expects the design to consume less power than a traditional ASIC-based hardware modem design.
Simulations show that for 3G/LTE applications the MCE architecture is consuming between about the same power as a dedicated hardware design to a few percent more, according to Charles Sturman, vice president of sales and marketing at Cognovo, writing in email to EE Times. Sturman said Cognovo's lead customers on the SDM are prepared to accept slightly increased power consumption in return for the benefits of multiple modem capability, reduced equipment design time and great design flexibility.
However, Sturman added that the current 3G/LTE benchmarks are based on the earlier MCE120 design which has only two vector signal processing cores. The MCE160 has six vector processors with the additional headroom intended to address LTE-Advanced communications.
Charles Sturman, vice president of sales and marketing at Cognovo Ltd.
"We do not have solid benchmarks on MCE160 or LTE-Advanced at this time. But from some qualitative estimations we have made, we would expect the power consumption parity to hold true," said Sturman. "However, where all this gets interesting is when you consider multi-mode and scaling modem receiver performance to deliver consistent quality of service across the cell from kilobits per second to megabits per second and GSM to LTE."
Sturman said that whereas a traditional ASIC-based design would have disparate processing blocks and embedded memories Cognovo will have a unified design that is reusable across the standards. As a result Cognovo can offer the same functionality as multiple modems but with typically 50 percent of the die area of a comparable multi-mode baseband device.
Not only would that result in lower power but Cognovo has pursued aggressive power control. "We will also be lower power since we can switch off elements of the datapath if not in use from cycle to cycle and we will not incur any power consumption penalty – even leakage – for 2G hardware if we are doing 3G."
Yet further power saving comes in the form of soft-equalization, Cognovo's Sturman said. He made the point that hardware-centric designs have to engineer for the worst case, where at the top end of modem speed, quality of service and distance to the basestation, a complex equalizer is necessary. "This will cost around 5 million gates just on its own – that's a huge area and will contribute a huge power consumption.
At shorter distances to the basestation, at lower data rates, or in applications where lower QoS can be tolerated, a simpler equalization would be acceptable but typically is not provided in a hardware ASIC. "With a soft modem you can, of course, have as many equalizers as you like and load them up as and when necessary. So apart from the die size saving here, we also expect to see a significant power consumption saving," Sturman said.
Cognovo is also designing in to its MCE chip and making available to licensees clock and voltage scaling to allow the processor speed and power consumption to be varied continuously so that the minimum energy is expended to provide the required bit-rate and quality of service demanded by the applications at any one time.
"So although at present we are confident we can demonstrate parity with hardware for single-mode peak power consumption, ultimately, we would expect to enable a soft multimode modem to exhibit power consumption well below a traditional hardware design," Sturman concluded.
Related links and articles:
www.cognovo.com
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