Intel's 22-nm tri-gate SoC, how low can you leak?

Intel's 22-nm tri-gate SoC, how low can you leak?

SAN FRANCISCO -- Intel will describe its 22-nm tri-gate (FinFET) SoC technology for mobile applications Monday (Dec. 10) at the International Electron Devices Meeting (IEDM) here.

The chip maker introduced a CPU version of its 22-nm offering in June, but Intel senior fellow Mark Bohr said in an interview that the recipe has been tweaked in order to scale down to a more mobile, ultra-low leakage version.

The change means Intel will now be able to boast product support from high performance servers down to cell phones on a tri-gate 22-nm process, with transistors covering a wide range of performance barriers.



Intel’s new SoC technology also includes high voltage I/O transistors, precision resistors, capacitors and inductors that were not included on the original CPU version of the chip.

The SoC’s will be ready for high volume manufacturing in 2013, Bohr said.

Intel had tended to focus heavily on performance, but is now looking to widen its transistor scope. On the performance side of the scale is the CPU version of Ivy Bridge, which also exhibits higher power leakage. On the lower end of the scale, however, Intel is seeking to offering a range of choices.



“There isn’t just one version of our SoC technology," Bohr said. "We [will] offer a rich menu of options to pick and choose from, both different transistor options and different interconnect options,” said Bohr.



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