FDSOI roadmap renames next node as 14-nm

FDSOI roadmap renames next node as 14-nm

LONDON – Documents presented at the fully depleted silicon on insulator (FDSOI) workshop in San Francisco this week show that the FDSOI roadmap now omits a 20-nm and goes straight to 14-nm and then on to 10-nm.

A summary slide from Horacio Mendez, executive director of the SOI Consortium, showed the jump with the comment that 14-nm FDSOI would be offered at the same time as Intel's 14-nm FinFET and would show the same performance characteristics but realizable at much lower cost. A presentation by Joel Hartmann, executive vice president of front-end process for STMicroelectronics, at the same meeting, organized by the SOI Consortium, also shows the move from 28-nm FDSOI, a process that is has started to ship in the second-half of 2012, on to 14-nm FDSOI and then 10-nm FDSOI.

Previously ST has spoken of the 28-nm FDSOI process prototyping in July 2012 followed by a 20-nm FDSOI process prototyping in 3Q13.

The implication is that parties interested in the FDSOI roadmap are renaming what was the 20-nm node so they can be seen to be at an equivalent node to Intel 14-nm FinFET process and FinFET processes from foundries such as Taiwan Semiconductor Manufacturing Co. Ltd. and Globalfoundries.

Hartmann's presentation provided the most recent results measured for the 28-nm FDSOI process made with multi-core ModAp NovaThor processor from ST-Ericsson and made extensive claims for the superiority of 28-nm ST's gate-first FDSOI manufacturing process in comparison with 28-nm bulk CMOS process in terms of ease of manufacture lower power consumption and higher performance.

Mendez shows the FDSOI roadmap now includes a 10-nm process to be offered in 2016, which will also be the point at which the FDSOI roadmap would introduce the option of FinFET over SOI.


Click on image to enlarge.
Fully depleted vision for SoCs through 10-nm. Source: SOI Consortium


Related links and articles:

www.soiconsortium.org

News articles:

28-nm FDSOI is production ready, says ST

ST voices new strategy, recommits to fully depleted SOI

SuVolta reports 65nm parameter results at IEDM

Intel's 22-nm tri-gate SoC process



TAG:SOI Consortium STMicroelectronics semiconductor